3DiS Technologies will be presenting “Wafer-level 3D system packaging of IoT devices enabled by conformal 3D Interconnects” during startup pitch session. Kindly attend our presentation the 27th of June at 4:30 pm.

SiP 2017 is the first System-in-Package (SiP) conference fully dedicated to covering all aspects related to SiPs – market trends, system integration/miniaturization, and new technology innovation enablers to meet current and future SiP challenges. This conference will bring the entire SiP supply and design chain from OEM, Fabless, IDM, OSAT, EMS, EDA, silicon foundries, equipment and material suppliers together under one roof.

Speakers, sponsors, exhibitors and attendees will focus on the insights of SiP technology in the relaxing Sonoma wine country of California, away from big city distractions.

Featuring three days of technical sessions, panel discussions, exhibitors and local activities, SiP 2017 will provide dynamic learning and technology updates for SiP related trends and new engineering innovations from the industry’s world SiP leaders.

The conference takes place at:
Doubletree Sonoma Wine Country
Sonoma, California – USA
June 27-29, 2017

http://www.imaps.org/sip/index.htm

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